CPM2 early console

[Alex Zeffertt]

On Tue, 04 Oct 2005 10:13:10 +0200
Kalle Pokki <kalle.pokki at iki.fi> wrote:

> I found it. It's in the MPC8272 family errata. When setting pipeline
> depth to one everything works. Can you Alex confirm this works also
> for you? 

Hi Kalle,  I've just checked and it makes no difference to the ATM
driver.  In fact, on my platform (PM828+u-boot-1.1.3) the pipeline
depth was already set to 1.

You are probably right that the pipeline depth was the cause of your
problem- but my problem is something else.  I think that Freescale
simply overlooked the ATM external connection table case when
designing the cache coherency protocol - because they offered no way
to assert GBL when external connection tables are accessed.

Alex