MPC8540 DMA routines (channel 0 broken?)

[Kumar Gala]

Glad to see that the issue was software.  If there is something going  
on in u-boot during init that isn't leaving the DMA channel in a  
clean state let me know.

Also, it looks like there maybe some proposal for a general DMA  
engine API.  If your interested take a look at the Linux Sympoisum  
2005 papers (Accelerating Network Receive Processing).  I'm hoping to  
talk to the guys doing this to see what their thoughts are.  If you  
have some feedback on what they are proposing let me know.

- kumar

On Jul 18, 2005, at 10:44 AM, Clemens Koller wrote:

> Hello, Stephane!
>
>
>>> In the meanwhile, I got channel 0 working. It seems
>>> that the DMA#0 machine got stuck in some configuration from any
>>> previous (u-boot?) operation which didn't clean up things
>>> properly. I had to explicitly abort a (continously running?)
>>> transfer to be able to re-program it in the way I need.
>>>
>>
>> Are you using a BDI2000?
>>
>
> Nope.
>
>
>> Some init mode uses the DMA#0 for memory zeroing (see your .cfg  
>> file).
>> Also the DDR ECC U-boot code may use the DMA#0.
>> Isn't it possible to reset the DMA#0 from Linux?
>>
>
> Thank you! Yes, that's true! <ACK>
>
> I've checked the U-Boot code, today. The problem comes up when
> U-Boot is built with CONFIG_DDR_ECC.
> The DMA #0 is used to initialize the DDR prior enabling ECC.
> Maybe the DMA doesn't get cleaned up properly.
> (I'll have to re-check the registers).
>
> But I can get my mpc85xx_dma "driver" working now.
> However I cannot disable ECC when I am in Linux for testing
> yet. :-]
> I'll need to customize U-Boot without ECC because I don't want
> to use it due to performance issues anyway.
> But that's getting OT here.
>
> Greets,
>
> Clemens Koller
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