mpc8xx and ld.so problem
Tom Rini
trini at kernel.crashing.org
Wed Jul 6 05:53:28 EST 2005
On Mon, Jul 04, 2005 at 11:22:14AM +0300, Yuli Barcohen wrote:
> >>>>> Jason McMullan writes:
>
> [...deleted...]
>
> Jason> Ha. Funny. The glibc powerpc maintainer doesn't want any
> Jason> embedded fixes in the mainline. Last I checked, that was for
> Jason> 'the tools vendors' to fix.
>
> Jason> "We won't work around processor bugs" is their philosophy.
>
> [...deleted...]
>
> I investigated the problem a bit when I had trouble with a self-compiled
> glibc a year or so ago. IIRC, I found bug in the memset code, not in the
> chip. The code was just wrong for cache line sizes not equal to 32. So
> memset.S is good for 60x series (PQII included) but for 8xx it fails. We
> use dcbX instructions in some kernel drivers and since we never had any
> problems with those drivers I'm a bit surprised to hear that all 8xx
> chips have got that bug.
It's also OK on a multiple of 32, iirc, but not smaller. And using the
information the kernel does export would be too slow. Or at least no
one figured out a good way to do it, userspace side.
--
Tom Rini
http://gate.crashing.org/~trini/
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