[patch] Race condition #1 in arch/ppc/cpm2_io/fcc_enet.c

Stefan Nickl Stefan.Nickl at kontron.com
Fri Nov 26 18:27:35 EST 2004


According to my PHY's (lxt972) datasheet, during the second half of a
read frame on the MDIO, the PHY drives MDIO to the value of the
respective data bit at the rising edge of MDC.

The current code samples MDIO immediately after it generates the rising
edge, so a fast enough processor (like the PowerQUICC III) will not read
the corresponding response of the PHY, but the value MDIO had in the
cycle before, which amounts to all response words appearing shifted by
one bit.

The patch simply moves the udelay(1) between rising MDC and reading
MDIO, leaving the PHY enough time to respond.

-- 
Stefan Nickl
Kontron Modular Computers

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