Barbier, Renaud (GE Infrastructure) Renaud.Barbier at ge.com
Tue Dec 7 05:23:09 EST 2004

can someone explain to me the purpose of the TS bit in the 440GX TLBs?

In the 440GX BSP, what is the point to map twice memory offset 0 (once with TS=0 and once with TS=1).
Is that for context switch?

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