Large TLBs on 40x
jwboyer at charter.net
Wed Aug 4 09:05:42 EST 2004
In 2.6, the PPC mm code for 4xx platforms uses large TLB entries for
most of RAM. Specifically, I am looking at arch/ppc/mm/4xx_mmu.c at the
mmu_mapin_ram function. In there, the pmd pointers are setup with
_PMD_SIZE_16M | _PAGE_HWEXEC | _PAGE_HWWRITE.
Doesn't this allow the text pages of the kernel to be written to? So to
my understanding, a buggy driver that went off into the weeds could
corrupt the text pages of the kernel.
I would think that you would want the kernel text pages to be
non-writable so that if something like the above scenario happened you
don't have possibly bad text pages. Debugging wouldn't be much fun.
I think I am missing something here. If so, please excuse my lack of
knowledge on TLBs, but I am somewhat new to the low level stuff. Anyone
care to point out what I am missing?
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