[PATCH] PPC4xx PHY interrupts patch

[Pavel Bartusek]

Hi all,

On PPC4xx are not currently supported interrupts from external PHY. It's
OK on all CPUs instead of IBM PPC440. The CPU has internal ZMII bridge
where must be set the current link speed (Speed Selection Register -
ZMII0_SSR).
The current interruptless implementation fails in the following cases:
- Linux starts without ethernet connection with default 10MB speed. When
you will try connect 100MB link it fails
- reconection between 100 and 10 MB connection

The attached patch uses the interrpts from PHY to detect link change and
sets apporiate speed in the Speed Selection Register and reports link
change to console. The patch was tested with the IBM evaluation Ebony board.

regards

--

Pavel Bartusek <pba at sysgo.de>
Software Engineering

SYSGO Real-Time Solutions AG | Embedded and Real-Time Software
Lise-Meitner-Str.15
89081 Ulm, Germany

Voice: +49-731-9533-1295
FAX:   +49-731-94683-10
www.sysgo.de | www.elinos.com | www.osek.de

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