interrupt handling in 7410+64260

Paul White pwhite at bivio.net
Wed Aug 27 13:18:23 EST 2003


Hello,

Its been a little while since I've looked at the GT64260 manual,
but I believe you configure the MPP pins as interrupt pins.  These
then are masked/seen via the GPP_INTR_CAUSE (0xf108) and
GPP_INTR_MASK (0xf10c) registers.  Then, I believe that somewhere in
the CPU's mask, you can enable/disable the GPP/MPP interrupts.

This is what I recall from memory, but hopefully it'll get you
started.

Paul White
Senior Enginer, Software
Bivio Networks, Inc.
http://www.bivio.net


On Wed, 27 Aug 2003, [ks_c_5601-1987] ½Å°æ¼ö wrote:

>
> I have a custom MPC7410 + GT64260 board and
> I successfully ported linux to that board.
> Now, I am trying to handle the mii interrupt.
> The MII INT Line is connected to MPP 14, 15.
> How to handle that interrupt or where I can find
> out the example for external interrupt with MPP
>
>


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