4xx watchdog handling

Brian Kuschak bkuschak at yahoo.com
Sat Nov 2 06:13:57 EST 2002

Regarding the way 2.4.19 handles the 4xx watchdog:

The 4xx timer interrupt, the PIT, is the lowest
priority exception (18). All the external IRQs come in
at a higher priority (16).  This is opposite of x86,
where the timer ISR is highest priority (0).

This would seem to negate the effectiveness of drivers
which implement "work limits" in their ISRs (like many
ethernet drivers).  These drivers do an RFI after
doing a certain amount of work, leaving the interrupt
pending and returning later to finish up.  In the case
of 4xx, a pending PIT interrupt would not be serviced
due to its lower priority.  In the case of heavy IRQ
load, the watchdog can expire.

Has anyone considered implementing the 4xx watchdog
interrupt itself as the place to refresh the watchdog?
 We could still use the existing method of a heartbeat
counter decremented each time, but just do the
refreshing in a watchdog ISR rather than the timer
ISR.  This way the watchdog could be reliably
refreshed even during heavy IRQ loads.

Any comments?


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