ppc405 enet changes (fwd)

[acmay at acmay.homeip.net]

On Wed, Sep 05, 2001 at 07:12:59AM -0700, jpeters at mvista.com wrote:
> In addition, many of the embedded system boards around are still
> not what you would call blindingly fast.  The 405 chips I had would
> do a maximum of 200 Mhz and the additional software cache
> coherency code made it look a lot slower.  In a situation like
> this anything to reduce instruction count speeds up execution.
> Especially if it is code that runs at interrupt level.

So did you chose the vars that were to be static and the ones in
dev->priv for speed? If so it would be nice to see how you decided
which ones when where.

I would think that it would be best to keep all the vars as close
together in mem as possible, to keep them on the fewest number of
cache-lines. By splitting them between two sections I would think
it hurts more than it helps.


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