EPIC Initizn

Sarnath Kannan sparc64 at rediffmail.com
Thu Nov 8 01:35:57 EST 2001

Dear Reader,
 I m trying to enable linux on a sandpoint X2 board.,
hosting MPC8240. EPIC is proving to be a great pain for
 I have initialized the EPIC to generate vectors
from 16-40 and the 8259 generates vector from 0-15.
s6 is down and 8259 is connected to IRQ1 of EPIC.
 All interrupts are LevelTriggered
and have -ve polarity. ( I have changed 8259 initz,
so that 8259 generates LEVEL triggered interrupts
just like the PCI devices ). The "get_irq" functin
has also been properly written. ( check for cascade
   I had setup the IRQ in pci_dev structure according
to their slot/pin configuration.

 I am trying to NFS mount the ROOT file system.

 The linux code is able to identify the NE2K ethernet
card sitting on PCI bus and is able to talk with it.
But my problem is that I am not getting interrupts.
( I verified by putting a printk in the ei_interrupt
 code )
 Another puzzling fact is that, if I program IRQ 16
( used by the NE2k driver. Card slot num 16,
  and hence connected to IRQ0 of EPIC ) of the EPIC for
+ve polarity & Level Triggered , I get non-stop
continous interrupts which just freeze the CPU.
  I am using the OpenPIC code, with slight modifns
(modifns invovle chaning the OpenPIC data structure
to reflect the  EPIC register layout.. added a PADding..
Another one is, I had changed OpenPIC init so that
it initializes for 16-40 ( 16 inclusive ). )

  I just checked Mvista code. The "disable_IRQ" and
"enable_IRQ" OpenPIC functions have been slightly changed
to suit LEVEL triggered interrupt handling,
May I know the necessity of the change ? My code
doesnt work even after incorporating this  fundaa
into mine.

  Am I missing something ??
  Any help would be greatly appreciated.


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