dcache BUG()

[Eli Chen]

> How can this happen?  The reservation for the lwarx in 1) has
> long been broken, so this swtcx. will fail.....
>
> -- Dan

Because reservation is held per processor in the "Reservation bit", and it
doesn't seem like the 405GP checks the reservation address.

>From the PPC manual:
"Because the hardware doesn't compare reservation address when executing the
stwcx. instruction, operating systems software MUST reset the reservation if
an exception or other types of interrupt occurs to insure atomic memory
references of lwarx and stwcx. pairs."

-eli


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