(allocating non-cachable memory) (or More on the i82596)

[Justin (Gus) Hurwitz]

On Fri, 29 Jun 2001, Dan Malek wrote:

>
> jtm at smoothsmoothie.com wrote:
>
> > .... The buffer memory will get filled
> > via DMA, and therefore must not be cached.
>
> Huh????  The 8260 is cache coherent, you don't need to do that.
>
> For processors that are not cache coherent (4xx and 8xx), there
> are standard 'consistent_alloc()' functions available.
>

Are those functions in the code for the 6xx proceesors? I have a 603e with
a broken memory controller- it does everything (or so I am assured) except
support atomic functions (ie, no memory coherency). If they are not in the
codo, are they at least portable to the 6xx?

Thanks,
--Gus


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