AW: uart.c and scc2

Grubmair Peter peter.grubmair at
Tue Nov 28 04:31:31 EST 2000

I have a patch for 2.2.14 at MPC850, which
supports RTS/CTS flow control, allows reordering
of SCC in rs_table (that means you can assign ttySx to
every SMC/SCC) and allows to configure more buffer for
SCC uarts ( 4 kB for receive, 8kB for transmit),
and is tested for baudrates up to (including) 460800 kBaud.
Additionally buffer_flush for these extended buffers is implemented,
and uarts can also operate in 8x oversampling mode, which is preferable for
some bad combinations of clock frequency and baudrate.
But as I need SCC uarts only for MPC850, I did code it  for other MPC8xx,
nor did I implement other features like DCD and other modem stuff.
If youe are interested, I can give it to you, but be aware its only
an implementation for special needs and is not fully tested
(e.g it crashes if on other side of line hw is sending at full speed
while you open  ttySx).
Best regards
-----Ursprüngliche Nachricht-----
Von: Julia Elbert [mailto:jelbert at]
Gesendet am: Montag, 27. November 2000 17:43
An: 'linuxppc-embedded at'
Betreff: uart.c and scc2

Does anyone know the status of scc2 in uart.c?
How far is it from working?

Very much appreciated.

** Sent via the linuxppc-embedded mail list. See

More information about the Linuxppc-embedded mailing list