4xx tlb questions

[ben bodley]

Mike Wolf wrote:

> Hi,
>   I'm new to kernel development and have a question
> on the 4xx.  Part of the tlb address is 8 bits from the
> PID register.  I cannot find the code that sets the PID
> register for user code.  I find code that sets the PID reg
> to 0, and I find code that saves the current value of PID reg
> and then setting it to 0 to do some work and then sets
> it back.  I was expecting to see something in sched.c that
> set the PID to some value from the task_struct on a context
> switch.
>
> Its not at all obvious to me how the PID is getting set.  The
> only other option I'm aware of is to invalidate the TLB on
> a context change, but I didnt see that either and the tlb
> handlers imply something else because they save the current
> value of the PID register.  If it was always 0 it wouldnt
> need that
>

mike,

the pid is set with the 'set_context()' function inside arch/ppc/head_4xx.S,
(see also include/asm/mmu_context.h) and some adjustments are needed for 4xx
core (see montavista's latest patch)..

the context (as far as i see it) seems to be based on the running vma's in the
system.. (allocated for process memory req's), when a new process is spawned a
new context is created for memory accessed by that process..

cheers,

ben


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