Strange behavior on FADS with ICTRL==0
jlewis at mvista.com
Sun Oct 10 01:18:37 EST 1999
Claude and Dan:
Thanks for the pointers. I do have an old chip and the erratta does describe this
problem. Shame on me for not having looked at the erratta!
Claude Robitaille wrote:
> Check the version of the chip and change it to a B2 version if it is
> not it. You should be able to get a sample.
> > Jim Lewis wrote:
> > > ........ If the ISCT_SER field of the
> > > ICTRL register is set to 0 (which is the value on reset), the system is
> > > very unstable.
> > You have to be very careful with the configuration of 8xx control and
> > debug registers. Depending upon the silicon revision, there are certain
> > errata that require explicit settings of these registers. This is certainly
> > one of them.....some die require serialization to be set, others require you
> > never set it, others require subsequent software work around depending
> > upon the setting.
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