IBM 40x and no L2 cache

[Paul Austin]

Hi,

I'm part of an project that is going to use Linux on an embedded system.
We're currently debating whether to use x86 or PPC. There are lots of
reasons for wanting to use an IBM 40x for our board. Unfortunately, however,
the 40x can't support an L2 cache. I've read lots of comments about the
absence of an L2 cache being bad for Linux performance. Does anyone have any
figures that say how bad?

Lots of thanks
Paul
 

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/