[PATCH 3/5] drm/radeon: Raise msi_addr_mask to 40 bits for pre-Bonaire

[Vivian Wang]

On 1/7/26 23:20, Christian König wrote:
> On 12/24/25 04:10, Vivian Wang wrote:
>> The code was originally written using no_64bit_msi, which restricts the
>> device to 32-bit MSI addresses.
>>
>> Since msi_addr_mask is introduced, use DMA_BIT_MASK(40) instead of
>> DMA_BIT_MASK(32) here for msi_addr_mask, describing the restriction more
>> precisely and allowing these devices to work on platforms with MSI
>> doorbell address above 32-bit space, as long as it is within the
>> hardware restriction of 40-bit space.
>>
>> Signed-off-by: Vivian Wang <wangruikang at iscas.ac.cn>
>> ---
>>  drivers/gpu/drm/radeon/radeon_irq_kms.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
>> index d550554a6f3f..ea519d43348b 100644
>> --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
>> +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
>> @@ -251,8 +251,8 @@ static bool radeon_msi_ok(struct radeon_device *rdev)
>>  	 * IBM POWER servers, so we limit them
>>  	 */
>>  	if (rdev->family < CHIP_BONAIRE) {
>> -		dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
>> -		rdev->pdev->msi_addr_mask = DMA_BIT_MASK(32);
>> +		dev_info(rdev->dev, "radeon: MSI limited to 40-bit\n");
>> +		rdev->pdev->msi_addr_mask = DMA_BIT_MASK(40);
> Well, that is not even remotely correct.
>
> Please move that close to the dma_set_mask_and_coherent() call in radeon_device_init() (file radeon_device.c).
>
> The check there is most likely already what you need. Should be pretty straight forward.

Thanks. In that case, maybe this msi_addr_mask thing was overcomplicated
after all. Maybe coherent_dma_mask is just the right thing to check anyway.

I'll see if I can figure something out. Of course I need to keep the
logic for Power still working...

Vivian "dramforever" Wang