[PATCH 0/3] Provide ability to enable PSL traces on card probe

[Vaibhav Jain]

This patch-set updates the cxl adapter probe procedure to selectively enable
PSL-traces at the end of a successful probe for a PSL9 based adapter. This would
let implementors of AFUs that use in-kernel apis to interact with the CXL
adapter get early debug data.

This feature is controlled via a new module parameter named 'enable_psltrace'
which is enabled by default. During adapter probe is this parameter is set
cxl will start PSL-traces on the adapter via PSL_TRACECFG register. The needed
sequence values written to the register was provided by the PSL h/w team.

This patch set is based on an earlier patch titled
"cxl: Remove function write_timebase_ctrl_psl9() for PSL9" available at [1].

Ref: [1] http://patchwork.ozlabs.org/patch/871199/ 
Vaibhav Jain (3):
  cxl: Introduce various enums/defines for PSL9 trace arrays
  cxl: Introduce module parameter 'enable_psltrace'
  cxl: Provide implementation for sl_ops.start_psltrace on PSL9

 drivers/misc/cxl/cxl.h    | 31 ++++++++++++++--
 drivers/misc/cxl/main.c   |  4 +++
 drivers/misc/cxl/native.c |  8 ++---
 drivers/misc/cxl/pci.c    | 91 ++++++++++++++++++++++++++++++++++++++++++-----
 4 files changed, 119 insertions(+), 15 deletions(-)

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2.14.3