[PATCH v5 1/7] powerpc/mm: update ptep_set_access_flag to not do full mm tlb flush

[Aneesh Kumar K.V]

"Aneesh Kumar K.V" <aneesh.kumar at linux.vnet.ibm.com> writes:

> Paul Mackerras <paulus at ozlabs.org> writes:
>

>>
>>  #define _PAGE_PTE		(1ul << 62)	/* distinguishes PTEs from pointers */
>>  #define _PAGE_PRESENT		(1ul << 63)	/* pte contains a translation */
>> diff --git a/arch/powerpc/mm/pgtable-book3s64.c b/arch/powerpc/mm/pgtable-book3s64.c
>> index f4f437c..7ff0289 100644
>> --- a/arch/powerpc/mm/pgtable-book3s64.c
>> +++ b/arch/powerpc/mm/pgtable-book3s64.c
>> @@ -86,7 +86,7 @@ pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
>>  {
>>  	unsigned long pmdv;
>>
>> -	pmdv = (pfn << PAGE_SHIFT) & PTE_RPN_MASK;
>> +	pmdv = ((pfn << PAGE_SHIFT) & PTE_RPN_MASK) | _PAGE_LARGE;
>>  	return pmd_set_protbits(__pmd(pmdv), pgprot);
>>  }
>>
>
> I will look at this and see if can make the patch simpler. But do we
> really want to use the pte bit for this ? Aren't we low on free pte bits


Ok this will work, provided we are ok to take up two pte bits for this
So we can use make_huge_pte() to fixup the pte entry for hugetlb and
pmd_mkhuge() to fixup the THP.

Now the question will be how will we support _PAGE_DEVMAP (for nvidmm).
We don't have free software pte bits after we make the above change.

NOTE: We do have 3 reserved bits(ppc bit 4-6 ) can we use that ?

-aneesh