[PATCH 3/3] powerpc/corenet: add support for the kmcent2 board
Valentin Longchamp
valentin.longchamp at keymile.com
Fri Dec 16 00:22:28 AEDT 2016
This board is built around Freescale's T1040 SoC.
The peripherals used by this design are:
- DDR3 RAM with SPD support
- parallel NOR Flash as boot medium
- 1 PCIe bus (PCIe1 x1)
- 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
- 4 IFC bus devices:
- NOR flash
- NAND flash
- QRIO reset/power mgmt CPLD
- BFTIC chassis management CPLD
- 2 I2C buses
- 1 SPI bus
- HDLC bus with the QE's UCC1
- last but not least, the mandatory serial port
The board can be used with the corenet32_smp_defconfig.
Signed-off-by: Valentin Longchamp <valentin.longchamp at keymile.com>
---
arch/powerpc/boot/dts/fsl/kmcent2.dts | 303 ++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/corenet_generic.c | 1 +
2 files changed, 304 insertions(+)
create mode 100644 arch/powerpc/boot/dts/fsl/kmcent2.dts
diff --git a/arch/powerpc/boot/dts/fsl/kmcent2.dts b/arch/powerpc/boot/dts/fsl/kmcent2.dts
new file mode 100644
index 0000000..47afa43
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/kmcent2.dts
@@ -0,0 +1,303 @@
+/*
+ * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
+ *
+ * (C) Copyright 2016
+ * Valentin Longchamp, Keymile AG, valentin.longchamp at keymile.com
+ *
+ * Copyright 2014 - 2015 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "t104xsi-pre.dtsi"
+
+/ {
+ model = "keymile,kmcent2";
+ compatible = "keymile,kmcent2";
+
+ aliases {
+ front_phy = &front_phy;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ bman_fbpr: bman-fbpr {
+ size = <0 0x1000000>;
+ alignment = <0 0x1000000>;
+ };
+ qman_fqd: qman-fqd {
+ size = <0 0x400000>;
+ alignment = <0 0x400000>;
+ };
+ qman_pfdr: qman-pfdr {
+ size = <0 0x2000000>;
+ alignment = <0 0x2000000>;
+ };
+ };
+
+ ifc: localbus at ffe124000 {
+ reg = <0xf 0xfe124000 0 0x2000>;
+ ranges = <0 0 0xf 0xe8000000 0x04000000
+ 1 0 0xf 0xfa000000 0x00010000
+ 2 0 0xf 0xfb000000 0x00010000
+ 4 0 0xf 0xc0000000 0x08000000
+ 6 0 0xf 0xd0000000 0x08000000
+ 7 0 0xf 0xd8000000 0x08000000>;
+
+ nor at 0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x04000000>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+
+ nand at 1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc-nand";
+ reg = <0x1 0x0 0x10000>;
+ };
+
+ board-control at 2,0 {
+ compatible = "keymile,qriox";
+ reg = <0x2 0x0 0x80>;
+ };
+
+ chassis-mgmt at 6,0 {
+ compatible = "keymile,bfticu";
+ reg = <6 0 0x100>;
+ interrupt-controller;
+ interrupt-parent = <&mpic>;
+ interrupts = <11 1 0 0>;
+ #interrupt-cells = <1>;
+ };
+
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ dcsr: dcsr at f00000000 {
+ ranges = <0x00000000 0xf 0x00000000 0x01072000>;
+ };
+
+ bportals: bman-portals at ff4000000 {
+ ranges = <0x0 0xf 0xf4000000 0x2000000>;
+ };
+
+ qportals: qman-portals at ff6000000 {
+ ranges = <0x0 0xf 0xf6000000 0x2000000>;
+ };
+
+ soc: soc at ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+
+ spi at 110000 {
+ network-clock at 1 {
+ compatible = "zarlink,zl30364";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+
+ sdhc at 114000 {
+ status = "disabled";
+ };
+
+ i2c at 118000 {
+ clock-frequency = <100000>;
+
+ mux at 70 {
+ compatible = "nxp,pca9547";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c at 0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom at 54 {
+ compatible = "24c02";
+ reg = <0x54>;
+ pagesize = <2>;
+ read-only;
+ label = "ddr3-spd";
+ };
+ };
+
+ i2c at 7 {
+ reg = <7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ temp-sensor at 48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ label = "SENSOR_0";
+ };
+ temp-sensor at 4a {
+ compatible = "national,lm75";
+ reg = <0x4a>;
+ label = "SENSOR_2";
+ };
+ temp-sensor at 4b {
+ compatible = "national,lm75";
+ reg = <0x4b>;
+ label = "SENSOR_3";
+ };
+ };
+ };
+ };
+
+ i2c at 118100 {
+ clock-frequency = <100000>;
+
+ eeprom at 50 {
+ compatible = "atmel,24c08";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom at 54 {
+ compatible = "atmel,24c08";
+ reg = <0x54>;
+ pagesize = <16>;
+ };
+ };
+
+ i2c at 119000 {
+ status = "disabled";
+ };
+
+ i2c at 119100 {
+ status = "disabled";
+ };
+
+ serial2: serial at 11d500 {
+ status = "disabled";
+ };
+
+ serial3: serial at 11d600 {
+ status = "disabled";
+ };
+
+ usb0: usb at 210000 {
+ status = "disabled";
+ };
+ usb1: usb at 211000 {
+ status = "disabled";
+ };
+
+ display at 180000 {
+ status = "disabled";
+ };
+
+ sata at 220000 {
+ status = "disabled";
+ };
+ sata at 221000 {
+ status = "disabled";
+ };
+
+ fman at 400000 {
+ ethernet at e0000 {
+ fixed-link = <0 1 1000 0 0>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet at e2000 {
+ fixed-link = <1 1 1000 0 0>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet at e4000 {
+ status = "disabled";
+ };
+
+ ethernet at e6000 {
+ status = "disabled";
+ };
+
+ ethernet at e8000 {
+ phy-handle = <&front_phy>;
+ phy-connection-type = "rgmii";
+ };
+
+ mdio0: mdio at fc000 {
+ front_phy: ethernet-phy at 11 {
+ reg = <0x11>;
+ };
+ };
+ };
+ };
+
+
+ pci0: pcie at ffe240000 {
+ reg = <0xf 0xfe240000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+ pcie at 0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci1: pcie at ffe250000 {
+ status = "disabled";
+ };
+
+ pci2: pcie at ffe260000 {
+ status = "disabled";
+ };
+
+ pci3: pcie at ffe270000 {
+ status = "disabled";
+ };
+
+ qe: qe at ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si at 700 {
+ compatible = "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram at 1000 {
+ compatible = "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc_hdlc: ucc at 2000 {
+ device_type = "hdlc";
+ compatible = "fsl,ucc-hdlc";
+ rx-clock-name = "clk9";
+ tx-clock-name = "clk9";
+ fsl,tx-timeslot-mask = <0xfffffffe>;
+ fsl,rx-timeslot-mask = <0xfffffffe>;
+ fsl,siram-entry-id = <0>;
+ };
+ };
+};
+
+#include "t1040si-post.dtsi"
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index 1179115..2d28907 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -160,6 +160,7 @@ int __init corenet_gen_publish_devices(void)
"fsl,T1040RDB",
"fsl,T1042RDB",
"fsl,T1042RDB_PI",
+ "keymile,kmcent2",
"keymile,kmcoge4",
"varisys,CYRUS",
NULL
--
1.8.3.1
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