[v1,1/3] crypto: powerpc/sha1 - assembler
Herbert Xu
herbert at gondor.apana.org.au
Mon Mar 2 21:25:59 AEDT 2015
On Tue, Feb 24, 2015 at 08:36:40PM +0100, Markus Stockhausen wrote:
> This is the assembler code for SHA1 implementation with
> the SIMD SPE instruction set. With the enhanced instruction
> set we can operate on 2 32 bit words in parallel. That helps
> reducing the time to calculate W16-W79. For increasing
> performance even more the assembler function can compute
> hashes for more than one 64 byte input block.
>
> The state of the used SPE registers is preserved via the
> stack so we can run from interrupt context. There might
> be the case that we interrupt ourselves and push sensitive
> data from another context onto our stack. Clear this area
> in the stack afterwards to avoid information leakage.
>
> The code is endian independant.
>
> Signed-off-by: Markus Stockhausen <stockhausen at collogia.de>
All applied. Thanks!
--
Email: Herbert Xu <herbert at gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
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