[PATCH v3 1/6] powerpc/mm: any thread in one core can be the first to setup TLB1

Zhao C.H. chenhui.zhao at freescale.com
Thu Dec 24 11:47:21 AEDT 2015


Hi Scott,

I updated the patch a moment ago at http://patchwork.ozlabs.org/patch/560771/ .

Thanks,
Chenhui
________________________________________
From: Wood Scott-B07421
Sent: Thursday, December 24, 2015 5:27
To: Zhao Chenhui-B35336; Denis Kirjanov
Cc: linuxppc-dev at lists.ozlabs.org
Subject: Re: [PATCH v3 1/6] powerpc/mm: any thread in one core can be the first to setup TLB1

On Thu, 2015-12-03 at 19:27 +0800, Chenhui Zhao wrote:
>
> On Wed, Dec 2, 2015 at 8:12 PM, Denis Kirjanov <kda at linux-powerpc.org>
> wrote:
> > On 11/20/15, Chenhui Zhao <chenhui.zhao at freescale.com> wrote:
> > >  On e6500, in the case of cpu hotplug, either thread in one core
> > >  may be the first thread initilzing the TLB1. The subsequent threads
> > >  must not setup it again.
> > >
> > >  The code is derived from the comment of Scott Wood.
> > >
> > >  Signed-off-by: Chenhui Zhao <chenhui.zhao at freescale.com>
> > >  ---
> > >   arch/powerpc/include/asm/cputhreads.h | 7 +++++++
> > >   arch/powerpc/mm/tlb_nohash.c          | 4 +---
> > >   2 files changed, 8 insertions(+), 3 deletions(-)
> > >
> > >  diff --git a/arch/powerpc/include/asm/cputhreads.h
> > >  b/arch/powerpc/include/asm/cputhreads.h
> > >  index ba42e46..b56cece 100644
> > >  --- a/arch/powerpc/include/asm/cputhreads.h
> > >  +++ b/arch/powerpc/include/asm/cputhreads.h
> > >  @@ -94,6 +94,13 @@ static inline int cpu_last_thread_sibling(int
> > > cpu)
> > >           return cpu | (threads_per_core - 1);
> > >   }
> > >
> > >  +static inline u32 get_tensr(void)
> > >  +{
> > >  +        if (cpu_has_feature(CPU_FTR_SMT))
> > >  +                return mfspr(SPRN_TENSR);
> > >  +        else
> > >  +                return 1;
> > >  +}
> > If i get it right, SPRN_TENSR used in the code only if CONFIG_PPC64
> > is defined. Then we can make it noop on ppc32.
> >
> > Thanks!
>
> Yeah, SPRN_TENSR is defined when CONFIG_BOOKE or CONFIG_40x is enabled.
> I'd like to change the code like:
>
> static inline u32 get_tensr(void)
> {
> #ifdef CONFIG_BOOKE
>         if (cpu_has_feature(CPU_FTR_SMT))
>                 return mfspr(SPRN_TENSR);
> #endif
>         return 1;
> }

Are you going to respin?

-Scott


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