[PATCH v3 1/6] powerpc/mm: any thread in one core can be the first to setup TLB1

[Scott Wood]

On Wed, 2015-12-02 at 15:12 +0300, Denis Kirjanov wrote:
> On 11/20/15, Chenhui Zhao <chenhui.zhao at freescale.com> wrote:
> > On e6500, in the case of cpu hotplug, either thread in one core
> > may be the first thread initilzing the TLB1. The subsequent threads
> > must not setup it again.
> > 
> > The code is derived from the comment of Scott Wood.
> > 
> > Signed-off-by: Chenhui Zhao <chenhui.zhao at freescale.com>
> > ---
> >  arch/powerpc/include/asm/cputhreads.h | 7 +++++++
> >  arch/powerpc/mm/tlb_nohash.c          | 4 +---
> >  2 files changed, 8 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/powerpc/include/asm/cputhreads.h
> > b/arch/powerpc/include/asm/cputhreads.h
> > index ba42e46..b56cece 100644
> > --- a/arch/powerpc/include/asm/cputhreads.h
> > +++ b/arch/powerpc/include/asm/cputhreads.h
> > @@ -94,6 +94,13 @@ static inline int cpu_last_thread_sibling(int cpu)
> >  	return cpu | (threads_per_core - 1);
> >  }
> > 
> > +static inline u32 get_tensr(void)
> > +{
> > +	if (cpu_has_feature(CPU_FTR_SMT))
> > +		return mfspr(SPRN_TENSR);
> > +	else
> > +		return 1;
> > +}
> If i get it right, SPRN_TENSR used in the code only if CONFIG_PPC64
> is defined. Then we can make it noop on ppc32.

Please don't.  It accomplishes nothing other than adding an obstacle to
supporting this on ppc32.

-Scott