[PATCH 0/3] of: dts: enable memory at 0 quirk for PPC32 only
robherring2 at gmail.com
Sat Apr 19 01:37:58 EST 2014
On Fri, Apr 18, 2014 at 7:48 AM, Leif Lindholm <leif.lindholm at linaro.org> wrote:
> On Thu, Apr 17, 2014 at 07:43:13PM -0500, Rob Herring wrote:
>> On Thu, Apr 17, 2014 at 12:41 PM, Leif Lindholm
>> <leif.lindholm at linaro.org> wrote:
>> > drivers/of/fdt.c contains a workaround for a missing memory type
>> > entry on longtrail firmware. Make that quirk PPC32 only, and while
>> > at it - fix up the .dts files in the tree currently working only
>> > because of that quirk.
>> But why do you need this?
> Apart from the current code permitting recreating a 15+ year old
> firmware bug into completely new platform ports?
I would prefer to see a "WARN_ON(!IS_ENABLED(CONFIG_PPC32));" added here.
Really, I would like to see quirks like this fixed up out of line from
the normal flow somewhat like how PCI quirks are handled. So in this
example, we would just add the missing property to the dtb for the
broken platform before doing the memory scan. That does then require
libfdt which is something I'm working on.
> Because the UEFI stub for arm/arm64 needs to delete all of the "memory"
> nodes from the DT. And it would be nice to at least not have to compile
> the "and also delete anything called memory at 0" into the arm64 image. Or
> any image not including support for affected platforms.
I don't see why you would handle that in the EFI stub. Given our lack
of validation, I can see there is a chance this happens but I think it
is pretty small. Given we only have a ARM board, I'd say we are doing
>> > arch/arm/boot/dts/ste-ccu8540.dts | 1 +
>> > arch/mips/lantiq/dts/easy50712.dts | 1 +
>> > arch/mips/ralink/dts/mt7620a_eval.dts | 1 +
>> > arch/mips/ralink/dts/rt2880_eval.dts | 1 +
>> > arch/mips/ralink/dts/rt3052_eval.dts | 1 +
>> > arch/mips/ralink/dts/rt3883_eval.dts | 1 +
>> I'm not worried about these MIPS dts files because they are all
>> built-in, but you are breaking compatibility with old dtbs for this
>> ARM board.
> Yeah, sorry. Sending out a v2 of part 3 shortly.
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