[PATCH v2 2/3] powerpc/85xx: add hardware automatically enter altivec idle state

[Wang Dongsheng-B40534]

> -----Original Message-----
> From: Wang Dongsheng-B40534
> Sent: Tuesday, August 27, 2013 4:42 PM
> To: Wood Scott-B07421; galak at kernel.crashing.org
> Cc: linuxppc-dev at lists.ozlabs.org; Wang Dongsheng-B40534
> Subject: [PATCH v2 2/3] powerpc/85xx: add hardware automatically enter
> altivec idle state
> 
> From: Wang Dongsheng <dongsheng.wang at freescale.com>
> 
> Each core's AltiVec unit may be placed into a power savings mode
> by turning off power to the unit. Core hardware will automatically
> power down the AltiVec unit after no AltiVec instructions have
> executed in N cycles. The AltiVec power-control is triggered by hardware.
> 
> Signed-off-by: Wang Dongsheng <dongsheng.wang at freescale.com>
> ---
> *v2:
> Remove:
> delete setup_idle_hw_governor function.
> delete "Fix erratum" for rev1.
> 
> Move:
> move setup_* into __setup/restore_cpu_e6500.
> 
> diff --git a/arch/powerpc/include/asm/reg_booke.h
> b/arch/powerpc/include/asm/reg_booke.h
> index 86ede76..8364bbe 100644
> --- a/arch/powerpc/include/asm/reg_booke.h
> +++ b/arch/powerpc/include/asm/reg_booke.h
> @@ -217,6 +217,9 @@
>  #define	CCR1_DPC	0x00000100 /* Disable L1 I-Cache/D-Cache parity
> checking */
>  #define	CCR1_TCS	0x00000080 /* Timer Clock Select */
> 
> +/* Bit definitions for PWRMGTCR0. */
> +#define PWRMGTCR0_ALTIVEC_IDLE	(1 << 22) /* Altivec idle enable */
> +
>  /* Bit definitions for the MCSR. */
>  #define MCSR_MCS	0x80000000 /* Machine Check Summary */
>  #define MCSR_IB		0x40000000 /* Instruction PLB Error */
> diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
> b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
> index bfb18c7..90bbb46 100644
> --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
> +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
> @@ -58,6 +58,7 @@ _GLOBAL(__setup_cpu_e6500)
>  #ifdef CONFIG_PPC64
>  	bl	.setup_altivec_ivors
>  #endif
> +	bl	setup_altivec_idle
>  	bl	__setup_cpu_e5500
>  	mtlr	r6
>  	blr
> @@ -119,6 +120,7 @@ _GLOBAL(__setup_cpu_e5500)
>  _GLOBAL(__restore_cpu_e6500)
>  	mflr	r5
>  	bl	.setup_altivec_ivors
> +	bl	setup_altivec_idle
>  	bl	__restore_cpu_e5500
>  	mtlr	r5
>  	blr
> diff --git a/arch/powerpc/platforms/85xx/common.c
> b/arch/powerpc/platforms/85xx/common.c
> index d0861a0..93b563b 100644
> --- a/arch/powerpc/platforms/85xx/common.c
> +++ b/arch/powerpc/platforms/85xx/common.c
> @@ -11,6 +11,16 @@
> 
>  #include "mpc85xx.h"
> 
> +#define MAX_BIT				64
> +
This should be change to 63, i will fix this in next patch.

- dongsheng