[PATCH] powerpc/85xx: p1022ds: fix DIU/LBC switching with NAND enabled
Kumar Gala
galak at kernel.crashing.org
Fri Jul 27 04:53:44 EST 2012
On Jul 23, 2012, at 3:43 PM, Timur Tabi wrote:
> In order for indirect mode on the PIXIS to work properly, both chip selects
> need to be set to GPCM mode, otherwise writes to the chip select base
> addresses will not actually post to the local bus -- they'll go to the
> NAND controller instead. Therefore, we need to set BR0 and BR1 to GPCM
> mode before switching to indirect mode.
>
> Signed-off-by: Timur Tabi <timur at freescale.com>
> ---
> arch/powerpc/platforms/85xx/p1022_ds.c | 64 +++++++++++++++++++++++++++++++-
> 1 files changed, 62 insertions(+), 2 deletions(-)
applied to merge
- k
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