[PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id

[Kumar Gala]

On Oct 19, 2011, at 10:53 PM, Bhushan Bharat-R65777 wrote:

> 
> 
>> -----Original Message-----
>> From: linuxppc-dev-bounces+bharat.bhushan=freescale.com at lists.ozlabs.org
>> [mailto:linuxppc-dev-
>> bounces+bharat.bhushan=freescale.com at lists.ozlabs.org] On Behalf Of Kumar
>> Gala
>> Sent: Friday, October 14, 2011 1:23 PM
>> To: linuxppc-dev at ozlabs.org
>> Subject: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
>> 
>> Normally logical and hard cpu ID are the same, however in same cases like
>> on the P3060 they may differ.  Where the logical is 0..5, the hard id
>> goes 0,1,4..7.  This can causes issues for places we utilize PIR to index
>> into array like in debug exception handlers for finding the exception
>> stack.
> 
> Kumar, What should be the CONFIG_NR_CPUS for this? 8 or 6 ?

8.

- k