[PATCH] powerpc/85xx: clamp the P1022DS DIU pixel clock to allowed values
Kumar Gala
kumar.gala at freescale.com
Mon Jun 27 23:35:44 EST 2011
On Jun 23, 2011, at 2:48 PM, Timur Tabi wrote:
> To ensure that the DIU pixel clock will not be set to an invalid value,
> clamp the PXCLK divider to the allowed range (2-255). This also acts as
> a limiter for the pixel clock.
>
> Signed-off-by: Timur Tabi <timur at freescale.com>
> ---
> arch/powerpc/platforms/85xx/p1022_ds.c | 7 ++++++-
> 1 files changed, 6 insertions(+), 1 deletions(-)
applied to next
- K
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