[PATCH v2] powerpc32: Kexec support for PPC440X chipsets
suzuki at in.ibm.com
Mon Jul 18 14:04:59 EST 2011
On 07/12/11 12:14, Suzuki K. Poulose wrote:
> Changes from V1: Uses a tmp mapping in the other address space to setup
> the 1:1 mapping (suggested by Sebastian Andrzej Siewior).
> Note: Should we do the same for kernel entry code for PPC44x ?
> This patch adds kexec support for PPC440 based chipsets.This work is based
> on the KEXEC patches for FSL BookE.
> The FSL BookE patch and the code flow could be found at the link below:
> 1) Invalidate all the TLB entries except the one this code is run from
> 2) Create a tmp mapping for our code in the other address space and jump to it
> 3) Invalidate the entry we used
> 4) Create a 1:1 mapping for 0-2GiB in blocks of 256M
> 5) Jump to the new 1:1 mapping and invalidate the tmp mapping
> I have tested this patches on Ebony, Sequoia boards and Virtex on QEMU.
> It would be great if somebody could test this on the other boards.
Forgot to mention:
You would need the current snapshot of kexec-tools, available at
The following commits(in the current tree) are needed for the support of ppc32.
kexec-tools: ppc32: Fixup ThreadPointer for purgatory code
kexec-tools: powerpc: Use the #address-cells information to parsememory/reg
Fix memory errors on ppc
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