[PATCH 12/15] powerpc/book3e: Use way 3 for linear mapping bolted entry
benh at kernel.crashing.org
Tue Apr 19 08:44:21 EST 2011
> >> Seems like this should have a MMU Feature bit or something for A2.
> > Too early. We haven't detected the CPU and are establishing the initial
> > TLB entry here.
> How about wrapping with CONFIG_PPC_A2
> > Any reason why that wouldn't work on something else anyways ?
> No, I wasn't paying attention to what this code exactly was (not enough
> context in the diff), I see its our initial setup so not a big deal.
> Was thinking this was run-time exception handler code.
No, it's the boot time bolted entry.
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