Continual reading from the PowerPc time base register is not stable

[Csdncannon]

Yes, the missing 64-bit conversion is the key problem, I will try removing
isync later.

Thanks for your support.


2010/3/26 Segher Boessenkool <segher at kernel.crashing.org>

> > Yes indeed.  Could you post the relevant piece if disassembly from
> > your original binary (the one that has the problem)?  Or send me the
> > binary (not to the mailing list), I'll do it then.
>
> Ah scratch that.  I compiled your original code (after fixing the
> compile errors -- there is no such type as "bool" in C).
>
> The problem is that  (upper << 32) | lower  thing.  "upper" is a 32-bit
> type, so shifting it by 32 or more bits is undefined.  GCC compiles this
> to (shortened):
>
> 0: mftbu 9 ; mftbl 11 ; mftbu 0 ; cmpw 0,9 ; bne 0b  # so far so good
>   slwi 0,0,0 ; or 4,0,11 ; li 3,0 ; blr
>
> so it shifts by 0, i.e. it does  upper | lower .
>
> Case closed, no hardware problem :-)
>
>
> Segher
>
>
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