[PATCH 27/27] KVM: PPC: Add Documentation about PV interface
benh at kernel.crashing.org
Sun Jul 4 08:42:36 EST 2010
On Fri, 2010-07-02 at 20:41 +0200, Alexander Graf wrote:
> The u64s are 64-bit aligned, should they always be?
> That's obvious, isn't it? And the ABI only specifies u64s to be 32 bit
> aligned, no? At least that's what ld and std specify.
No, the PowerPC ABI specifies u64's to be 64-bit aligned, even for
> >> +The "ld" and "std" instructions are transormed to "lwz" and "stw"
> >> +respectively on 32 bit systems with an added offset of 4 to
> accomodate for big
> >> +endianness.
> > Will this add never overflow? Is there anything that checks for it?
> It basically means that to access dar, we either do
> ld rX, DAR(0)
> lwz rX, DAR+4(0)
> >> +mtmsrd rX, 0 b <special mtmsr section>
> >> +mtmsr b <special mtmsr section>
> > mtmsr rX
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