[PATCH 03/13] mpc52xx: add SCLPC register bit definitions

[Wolfgang Denk]

Dear Grant Likely,

In message <fa686aa41001111121u5c943fc7p789c0ec0b41af883 at mail.gmail.com> you wrote:
>
> >  /* mpc52xx_lpbfifo.c */
> >  #define MPC52XX_LPBFIFO_FLAG_READ              (0)
> > -#define MPC52XX_LPBFIFO_FLAG_WRITE             (1<<0)
> > -#define MPC52XX_LPBFIFO_FLAG_NO_INCREMENT      (1<<1)
> > -#define MPC52XX_LPBFIFO_FLAG_NO_DMA            (1<<2)
> > -#define MPC52XX_LPBFIFO_FLAG_POLL_DMA          (1<<3)
> > +#define MPC52XX_LPBFIFO_FLAG_WRITE             BIT(0)
> > +#define MPC52XX_LPBFIFO_FLAG_NO_INCREMENT      BIT(1)
> > +#define MPC52XX_LPBFIFO_FLAG_NO_DMA            BIT(2)
> > +#define MPC52XX_LPBFIFO_FLAG_POLL_DMA          BIT(3)
> 
> I prefer the (1<<n) style myself.

Indeed, especially as one can argue that "(1<<0)" should be "BIT(31)"
on Power Architecture systems, where bit 0 is the MSB by definition.

Best regards,

Wolfgang Denk

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