TBI interface

[Lamb, Jason (DS-1)]

Did you check your power on reset resistor values to make sure the  
correct phy management interface is selected?



On Feb 25, 2010, at 1:21 AM, "Hillery, Nathan" <nhillery at sixisinc.com>  
wrote:

> I have a system with an SGMII interface on an MPC8536E, attached to  
> a Marvel 88E6152 Ethernet switch chip.  I can access Ethernet from u- 
> boot, if I initially configure the MII “phy” and the switch port  
> PHY to disable auto-negotiation and assert link up.  The link speed  
> is 10Mbps and it is half-duplex.  When u-boot starts, reports that i 
> t didn’t recognize a PHY 0xFFFF id, and says it will assume a generi 
> c phy.
>
>
>
> Obviously, I’d like to run without having to manually configure and  
> have it run at 1gbps, full-duplex.
>
>
>
> However, I am not able to get linux to recognize the device – it rep 
> orts that a ten-bit interface (TBI) is required for SGMII and it can 
> ’t find one.  I have a tbi-phy entry in the device-tree file.   
> Here’s the relevant snippet:
>
>
>
>                 mdio at 24520 {
>
>                         #address-cells = <1>;
>
>                         #size-cells = <0>;
>
>                         compatible = "fsl,gianfar-tbi";
>
>                         reg = <0x24520 0x20>;
>
>
>
>                         phy0: ethernet-phy at 0x10 {
>
>                                 interrupt-parent = <&mpic>;
>
>                                 interrupts = <10 0x1>;
>
>                                 reg = <0x10>;
>
>                                 device_type = "ethernet-phy";
>
>                         };
>
>
>
>                         tbi0: tbi-phy at 4 {
>
>                                 reg = <0x4>;
>
>                                 device_type = "tbi-phy";
>
>                         };
>
>                 };
>
>                                 enet0: ethernet at 24000 {
>
>                                                 cell-index = <0>;
>
>                                                 device_type =  
> "network";
>
>                                                 model = "eTSEC";
>
>                                                 compatible =  
> "gianfar";
>
>                                                 reg = <0x24000  
> 0x1000>;
>
>                                                 local-mac-address =  
> [ 00 00 00 00 00 00 ];
>
>                                                 interrupts = <29 2 30 2 34 2 
> >;
>
>                                                 interrupt-parent =  
> <&mpic>;
>
>                                                 tbi-handle = <&tbi0>;
>
>                                                 phy-handle = <&phy0>;
>
>                                                 phy-connection-type  
> = "sgmii";
>
>                                                 fsl,magic-packet;
>
>                                                 fsl,wake-on-filer;
>
>                                 };
>
>
>
> The processor has an MDIO interface to the switch.  The switch port  
> PHYs are 0x10, 0x11, 0x12, 0x13, 0x17, and 0x19. I picked 4 for the  
> TBI arbitrarily (but seeking to avoid conflicting a PHY address).
>
>
>
> Any hints will be appreciated.
>
> _______________________________________________
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> Linuxppc-dev at lists.ozlabs.org
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