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<TITLE>Re: TBI interface</TITLE>
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<P><FONT SIZE=2>Did you check your power on reset resistor values to make sure the <BR>
correct phy management interface is selected?<BR>
<BR>
<BR>
<BR>
On Feb 25, 2010, at 1:21 AM, "Hillery, Nathan" <nhillery@sixisinc.com> <BR>
wrote:<BR>
<BR>
> I have a system with an SGMII interface on an MPC8536E, attached to <BR>
> a Marvel 88E6152 Ethernet switch chip. I can access Ethernet from u-<BR>
> boot, if I initially configure the MII “phy” and the switch port <BR>
> PHY to disable auto-negotiation and assert link up. The link speed <BR>
> is 10Mbps and it is half-duplex. When u-boot starts, reports that i<BR>
> t didn’t recognize a PHY 0xFFFF id, and says it will assume a generi<BR>
> c phy.<BR>
><BR>
><BR>
><BR>
> Obviously, I’d like to run without having to manually configure and <BR>
> have it run at 1gbps, full-duplex.<BR>
><BR>
><BR>
><BR>
> However, I am not able to get linux to recognize the device – it rep<BR>
> orts that a ten-bit interface (TBI) is required for SGMII and it can<BR>
> ’t find one. I have a tbi-phy entry in the device-tree file. <BR>
> Here’s the relevant snippet:<BR>
><BR>
><BR>
><BR>
> mdio@24520 {<BR>
><BR>
> #address-cells = <1>;<BR>
><BR>
> #size-cells = <0>;<BR>
><BR>
> compatible = "fsl,gianfar-tbi";<BR>
><BR>
> reg = <0x24520 0x20>;<BR>
><BR>
><BR>
><BR>
> phy0: ethernet-phy@0x10 {<BR>
><BR>
> interrupt-parent = <&mpic>;<BR>
><BR>
> interrupts = <10 0x1>;<BR>
><BR>
> reg = <0x10>;<BR>
><BR>
> device_type = "ethernet-phy";<BR>
><BR>
> };<BR>
><BR>
><BR>
><BR>
> tbi0: tbi-phy@4 {<BR>
><BR>
> reg = <0x4>;<BR>
><BR>
> device_type = "tbi-phy";<BR>
><BR>
> };<BR>
><BR>
> };<BR>
><BR>
> enet0: ethernet@24000 {<BR>
><BR>
> cell-index = <0>;<BR>
><BR>
> device_type = <BR>
> "network";<BR>
><BR>
> model = "eTSEC";<BR>
><BR>
> compatible = <BR>
> "gianfar";<BR>
><BR>
> reg = <0x24000 <BR>
> 0x1000>;<BR>
><BR>
> local-mac-address = <BR>
> [ 00 00 00 00 00 00 ];<BR>
><BR>
> interrupts = <29 2 30 2 34 2<BR>
> >;<BR>
><BR>
> interrupt-parent = <BR>
> <&mpic>;<BR>
><BR>
> tbi-handle = <&tbi0>;<BR>
><BR>
> phy-handle = <&phy0>;<BR>
><BR>
> phy-connection-type <BR>
> = "sgmii";<BR>
><BR>
> fsl,magic-packet;<BR>
><BR>
> fsl,wake-on-filer;<BR>
><BR>
> };<BR>
><BR>
><BR>
><BR>
> The processor has an MDIO interface to the switch. The switch port <BR>
> PHYs are 0x10, 0x11, 0x12, 0x13, 0x17, and 0x19. I picked 4 for the <BR>
> TBI arbitrarily (but seeking to avoid conflicting a PHY address).<BR>
><BR>
><BR>
><BR>
> Any hints will be appreciated.<BR>
><BR>
> _______________________________________________<BR>
> Linuxppc-dev mailing list<BR>
> Linuxppc-dev@lists.ozlabs.org<BR>
> <A HREF="https://lists.ozlabs.org/listinfo/linuxppc-dev">https://lists.ozlabs.org/listinfo/linuxppc-dev</A><BR>
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