AW: PowerPC PCI DMA issues (prefetch/coherency?)

Pravin Bathija pbathija at amcc.com
Fri Sep 11 15:35:21 EST 2009


> Stefan Roese wrote:
> Correct. IIRC, some PATA driver as Pravin already mentioned.
 
> Cheers,
> Stefan

Thanks Stefan. The whole intention of the patch/hack (or whatever one might call it :) ) was to avoid rogue drivers from setting pci_cache_line_size to non-zero value even though the underlying hardware doesn't support MRM calls. Nonetheless this approach works only if the drivers use the kernel API for PCI config space access provided by the powerpc platform driver.

Regards,
Pravin


On Friday 11 September 2009 07:17:50 Benjamin Herrenschmidt wrote:
> On Fri, 2009-09-11 at 07:12 +0200, Stefan Roese wrote:
> > It's already there. See commit:
> >
> > 5ce4b59653b2c2053cd9a011918ac1e4747f24cc
> >
> > powerpc/4xx: Workaround for PPC440EPx/GRx PCI_28 Errata
> 
> Ok, that's another way to do it. Will catch nasty drivers who
> try to write directly rather than clear pci_cache_line_size I suppose...



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