[RFC][PATCH v5] MPC5121 TLB errata workaround

[Kumar Gala]

On Mar 16, 2009, at 11:09 AM, David Jander wrote:

>
> In this patch, I placed the LRW table in SPRG6 like before, but  
> Kumar's code
> seems a little more compact, so I decided to use that one and fix  
> it ;-)
>
> It's a pity we seem to have one register short in the handler, so we  
> need to
> load SPRN_SRR1 twice :-(
>
> Allthough the code-path now has 1 instruction less than my previous  
> version
> most of the time (and 2 instructions more when way is not adjusted),
> benchmark results are barely affected by this:
>
> 1.- mplayer: Total time: 50.392s (50.316s previous patch)
>
> 2.- prboom timedemo: 20.1 fps (19.9 fps previous patch)
>
> 3.- memcpy speed: 179 MByte/s (180 Mbyte/s previous patch)
>
> Conclusion: difference not measurable between v4 and v5.

Can we try this memory instead of the SPRG to see if any noticeable  
difference?

- k