SD card over (xilinx_)SPI, timeout error while CID
Ricardo Ribalda Delgado
ricardo.ribalda at uam.es
Fri Jun 12 07:16:56 EST 2009
Hello Wolfgang
>
> This is with a 4xx core, right? Is this the same SPI controller design
> like in AMCC's 40x and 44x cores, i. e. with a "FIFO" of depth 1?
It is a ppc440 but it is does not have ans spi controller as in the
amcc. The spi controller is a xilinx core allocated at the plb bus,
including a deeper fifo.
The actual version does not have a sustained speed of 33Mhz but a can
have a peak speed of 33 MHz
Thanks for your comment
--
Ricardo Ribalda
http://www.eps.uam.es/~rribalda/
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