[RFC][PATCH v5] MPC5121 TLB errata workaround

[Wolfgang Denk]

Dear David Jander,

In message <200903161652.09747.david.jander at protonic.nl> you wrote:
> Complete workaround for DTLB errata in e300c2/c3/c4 processors.
> 
> Due to the bug, the hardware-implemented LRU algorythm always goes to way
> 1 of the TLB. This fix implements the proposed software workaround in
> form of a LRW table for chosing the TLB-way.
> 
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
> Signed-off-by: David Jander <david at protonic.nl>

What is the actual status of this patch?

Patchwork (http://patchwork.ozlabs.org/patch/24502/) says it's
"superseded" - but by what?

I can't see such code in mainline - what happened to it?

Best regards,

Wolfgang Denk

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