Soft Reset for PPC44x Virtex 5 hangs saying Restarting System

srikanth krishnakar skrishnakar at gmail.com
Tue Jul 14 01:39:55 EST 2009


On Mon, Jul 13, 2009 at 8:32 PM, Grant Likely <grant.likely at secretlab.ca>wrote:

> On Mon, Jul 13, 2009 at 1:16 AM, srikanth
> krishnakar<skrishnakar at gmail.com> wrote:
> > Hi all,
> >
> > Kernel : Linux-2.6.29
> > Arch: Powerpc (ppc44x)
> > Target: Xilinx ML507 Virtex5
> >
> > I have an issue in "Reset System" of Xilinx ML507 target board. I am
> using
> > Compact Flash to boot the target ( using system ACE file to boot the
> > target), during the process reset or reboot command on the target, I am
> not
> > able to reboot the target completely, here is the snapshot:
>
> Where is your boot code located?  In BRAM?  or SDRAM?


It is located in BRAM.


>  If it is in
> RAM, then it is likely that your boot code gets overwritten when the
> Linux kernel boots and so soft resetting the processor will result in
> a hung system (because it doesn't have any boot code to run).
>
> >
> -----------------------------------------------------------------------------------------------------
> >
> > The target again doesn't provide me the boot options as obtained when
> done
> > hard reset :
>
> What boot options are you referring to?


Boot options: console=ttyS0,9600 ip=bootp root=/dev/nfs rw


>  SystemACE boot configuration?


Yes. I have created SystemACE file using XMD to boot the target, I place
system.ace file in compact flash with rootfs NFS,

I see current ppc4xx_reset_system has been set to : DBCR_RST_SYSTEM  so that
is system reset but leaves the FPGA still programmed, I tried writing
DBCR_RST_CORE to DBCR0 that leads to segmentation fault as ;

void ppc4xx_reset_system(char *cmd)
{
        mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_RST_SYSTEM);  << Tried
using DBCR0_RST_CORE
        while (1)
                ;       /* Just in case the reset doesn't work */
}

--------------------------------------------------------------

root at xilinx-ml507:~# reboot

INIT: Sending processes the TERM signal
INIT: Stopping OpenBSD Secure Shell server: sshdstopped /usr/sbin/sshd (pid
105)
.
Stopping Vixie-cron.
Stopping network benchmark server: netserverstopped /usr/sbin/netserver (pid
10)
.
Stopping syslogd/klogd: stopped syslogd (pid 1060)
stopped klogd (pid 1062)
done
NOT deconfiguring network interfaces: / is an NFS mount
Sending all processes the TERM signal...
Sending all processes the KILL signal...
hwclock: can't open '/dev/misc/rtc': No such file or directory
Unmounting remote filesystems...
Deactivating swap...
/etc/rc6.d/S40umountfs: line 9: swapoff: not found
Unmounting local filesystems...
umount2: Device or resource busy
umount: none busy - remounted read-only
Rebooting... Restarting system.
Oops: Exception in kernel mode, sig: 11 [#1]
PREEMPT LTT NESTING LEVEL : 0
Xilinx Virtex440
Modules linked in: nls_iso8859_1 ipv6
NIP: fffffffc LR: c000d14c CTR: c0018b64
REGS: cf373d50 TRAP: 0700   Not tainted  (2.6.29.6)
MSR: 00000000 <>  CR: 22444428  XER: 20000001
TASK = cf9acbf0[1101] 'reboot' THREAD: cf372000
GPR00: 50000000 cf373e00 cf9acbf0 00000000 000018ef ffffffff c026493c
00004000
GPR08: c04a5c8c c04a0000 00003fff 000018ef 22444422 1001a5a0 00008000
ffffffff
GPR16: 00000000 00000000 10000000 00000004 00000001 00000000 00000000
00000001
GPR24: 01230000 00000001 00000000 00000000 00000000 01234567 28121969
00000000
NIP [fffffffc] 0xfffffffc
LR [c000d14c] machine_restart+0x34/0x48
Call Trace:
[cf373e00] [c000d130] machine_restart+0x18/0x48 (unreliable)
[cf373e10] [c0046530] kernel_restart+0x34/0x5c
[cf373e20] [c0046684] sys_reboot+0x124/0x1a4
[cf373f40] [c000e164] ret_from_syscall+0x0/0x3c
Instruction dump:
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
---[ end trace 51d087d0d6d3d0e5 ]---
Segmentation fault
----------------------------------------------------------------------------------

How can I reboot the system, while resetting the FPGA core completely ?


> The current system ace driver doesn't have any support for either
> setting the boot options or using the systemace to reboot the system
> by reconfiguring the FPGA.  It shouldn't be hard to do, it just hasn't
> been written.
>
> g.
>
> --
> Grant Likely, B.Sc., P.Eng.
> Secret Lab Technologies Ltd.
>

Thanks for you patience !

-Srikanth


-- 
"The Good You Do, The Best You GET"

Regards
Srikanth Krishnakar
**********************
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