Broken PCI on Sequoia
fkan at amcc.com
Sat Jan 31 12:19:11 EST 2009
It looks like the top bit is hard coded to 1. There doesn't seem to
Of changing it.
From: linuxppc-dev-bounces+fkan=amcc.com at ozlabs.org
[mailto:linuxppc-dev-bounces+fkan=amcc.com at ozlabs.org] On Behalf Of
Sent: Friday, January 30, 2009 1:30 PM
To: Geert Uytterhoeven
Cc: Linux/PPC Development
Subject: Re: Broken PCI on Sequoia
> For that sort of 4xx PHB (ie, the PCI 2.x ones, not the PCI-X nor the
> PCI-E), we only know how to program 32-bit of PLB address. IE. The old
> code would have cropped the plb_addr when writing to the register, the
> new code complains.
> I suspect some implementation support a register to put the "high"
> of the PLB address, and that it already contains 1, so the old code
> would have worked by chance, the new code doesn't because it bails
Hrm... from the doco it's also one 32-bit register... I'm starting to
think that those guys always assume the top 1 bit is set or something
like that ...
The doc is unclear. Maybe somebody form AMCC can confirm ?
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