[PATCH 2/2] powerpc/83xx: Fix TSEC0 workability on MPC8313E-RDB boards

[Kumar Gala]

On Feb 9, 2009, at 1:47 AM, Li Yang wrote:

>
> It's a complex case for RDB boards.  The revision A and revision B
> boards DO always connect TSEC0 to Vitesse switch.  While the latest
> revision C board has one setting to connect TSEC0 to a Marvell PHY and
> MDIO bus.  In BSP we have several DTS's for each setting of the board,
> shouldn't we do the same for upstream?

Is this something we can detect and deal with in u-boot?  If not than  
having multiple .dts for the revisions seems like the only solution.

- k