tracking of PCI address space

[Kumar Gala]

I was wondering if we have anything that tracks regions associated  
with the "inbound" side of a pci_bus.

What I mean is on embedded PPC we have window/mapping registers for  
both inbound (accessing memory on the SoC) and outbound (access PCI  
device MMIO, IO etc).  The combination of the inbound & outbound  
convey what exists in the PCI address space vs CPU physical address  
space (and how to map from one to the other).  Today in the PPC land  
we only attach outbound windows to the pci_bus.  So technically the  
inbound side information (like what subset of physical memory is  
visible on the PCI bus) seems to be lost.

- k