GPIO - marking individual pins (not) available in device tree
David Gibson
david at gibson.dropbear.id.au
Mon Oct 27 10:47:47 EST 2008
On Fri, Oct 24, 2008 at 05:14:26PM -0500, Matt Sealey wrote:
>
>
> David Gibson wrote:
>> Don't be patronising.
>>
>> There is an existing address space defined by the gpio binding.
>> Defining another one is pointless redundancy. This is standard good
>> ideas in computer science, no further argument necessary.
>
> The existing address space, and the patches Anton etc. just submitted
> which I started this discussion to address, don't fulfil certain
> needs.
Such as what? Apparently none, since elsewhere in this thread you
seem to be happy with the suggestion of using a gpio-header node,
which does use the same address space.
> You could do better than call it insane, by describing how you would
> define a gpio bank that used 3 seperate pins which are NOT together
> in a register, using a base address (reg) and base property (offset
> of first pin) with the current system?
Um.. I can't actually follow what you're getting at there, sorry.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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