Feedback requested on switching the exception wrapper used for the PMU interrupt on ppc64

Corey J Ashford cjashfor at
Sat May 17 07:25:34 EST 2008

Paul Mackerras <paulus at> wrote on 05/15/2008 06:02:03 PM:

> Corey J Ashford writes:
> > Thanks for the feedback.  I don't believe I need a separate flag,
> > the PMU interrupt (via the PMAO bit) will still be pending when
> > are hard enabled again, and the handler will be reentered
> If that were the case then we wouldn't have had the problem with
> losing PMU interrupts that meant we had to change the PMU interrupt
> handler from a MASKABLE_EXCEPTION to a STD_EXCEPTION.  This was in
> commit 449d846dbcbf61bdf7d50a923e4791102168c292.
> My understanding is that the PMU only requests an interrupt when PMAO
> goes from 0 to 1 (i.e. it's edge-triggered).  If the CPU takes the
> interrupt and then sets MSR.EE again (e.g. by returning from the
> interrupt handler), and PMAO has not been reset to 0, then I don't
> think the PMU requests another interrupt at that point.

I went back and looked through my notes, and found that the problem with
looping in the interrupt handler I had a couple of months ago was not with
PMAO not being cleared, but because there were unused counters (PMC5 and/or
PMC6) were not zeroed out in the interrupt handler and so they continued to
count past 0x80000000, causing PMAO to become asserted on every count.
This was on POWER5+, and so the behavior may be different on other chips.
I do find it a little odd that it would set PMAO on every count past
0x80000000, instead of just on the transition from 0x7fffffff to

In any case, I do need to save the fact that an interrupt occurred and to
reassert the interrupt in local_irq_restore (it appears to be the case that
raw_local_irq_restore for POWER is new in 2.6.26.  I'm working on 2.6.25 at
the moment)

Thanks for your reply, as it could have taken me a long time to find this
problem otherwise.

- Corey

Corey Ashford
Software Engineer
IBM Linux Technology Center, Linux Toolchain
Beaverton, OR
cjashfor at
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