[PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart16550.

[Stephen Neuendorffer]

I thought about this, and reconsidered it again after I finally figured
out how to get the Power.org website to relenquish the ePAPR spec, which
(FWIW) has reg-shift as an optional property of the ns16550 binding.

However, I'm not enamoured of it, since I doubt it's really good to be
doing ioremaps and memory management on unaligned blocks.  It seems more
logical to me to have the reg property define a range of aligned
addresses, and in this case, it happens that the driver never touches
some of those bytes.

In any event, the real point of the patch was to spark some discussion,
which we failed to get otherwise.. :)  I think any of these proposals
are workable...

Steve

> -----Original Message-----
> From: linuxppc-dev-bounces+stephen.neuendorffer=xilinx.com at ozlabs.org
[mailto:linuxppc-dev-
> bounces+stephen.neuendorffer=xilinx.com at ozlabs.org] On Behalf Of
Segher Boessenkool
> Sent: Friday, March 21, 2008 4:40 AM
> To: Paul Mackerras
> Cc: linuxppc-dev at ozlabs.org; John Linn
> Subject: Re: [PATCH 2/3] [POWERPC] Xilinx: of_serial support for
Xilinx uart16550.
> 
> >> Personally, I'm not fond of this approach.  There is already some
> >> traction to using the reg-shift property to specify spacing, and I
> >> think it would be appropriate to also define a reg-offset property
to
> >> handle the +3 offset and then let the xilinx 16550 nodes use those.
> >
> > Why do we need a reg-offset property when we can just add the offset
> > to the appropriate word(s) in the reg property?
> 
> Because if you do that, the "reg" property cannot describe the full
> register block (it misses the first few bytes).  Not a huge problem
> in practice, sure.
> 
> 
> Segher
> 
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