[PATCH 10/11] celleb: add support for PCI Express

[Ishizaki Kou]

Arnd Bergmann <arnd at arndb.de> wrote:
> On Wednesday 05 March 2008, Ishizaki Kou wrote:
> > This patch adds support for PCI Express port on Celleb. I/O space
> > of this PCI Express port is not mapped in memory space. So we use
> > the io-workaround mechanism to make accesses indirect.
> > 
> > Signed-off-by: Kou Ishizaki <kou.ishizaki at toshiba.co.jp>
> 
> Acked-by: Arnd Bergmann <arnd at arndb.de>
> 
> This one looks good, but I wonder if we should make it possible to
> also use it on QS20, which the current code doesn't allow.
> 
> It's a rather hypothetical question, because QS20 has been replaced
> by QS21 as a product and it never supported PCIe cards with I/O space
> mappings, but it would be the "right" thing to do.
> 
> Since you don't have the QS20 hardware to test that, and I currently
> doubt anyone at IBM has the energy to do the work, it will probably
> never get done. If you send another version of the patch, maybe you
> can add comments to hint that this is actually possible, just hasn't
> been implemented.

Sorry, I don't know about QS20 and its chipset. However, if anyone
changes the code to work also on QS20, I'll welcome the change and
test it on Celleb.

Though I don't know it helps you, I explain a little about Celleb.

The way to access SCC PCIe I/O port is the same as the way to access
its config space.
 - Write an address to the address register.
 - Write an 'I/O port write' or 'I/O port read' command with byte
   enable bits to the command register.
 - Write or Read the data register.
That's all, and you can find this in my code.


By the way, I found a minor bug in my patch. I'll send fixed one.

> +	dummy_page_da = dma_map_single(bus->phb->parent, dummy_page_va,
> +			PAGE_SIZE, DMA_FROM_DEVICE);
> +	if (dummy_page_da == DMA_FROM_DEVICE) {

Comparing with DMA_FROM_DEVICE is wrong. We should compare with
DMA_ERROR_CODE. And using dma_mapping_error() is the right way.


Best regards,
Kou Ishizaki