Virqs of cascaded interrupt controller.

Welch, Martyn (GE EntSol, Intelligent Platforms) martyn.welch at gefanuc.com
Tue Jun 24 00:00:35 EST 2008


Hi,

I'm in the process of porting Linux to one of our boards based on an
8641D. Some of the interrupts of on-board devices are dealt with by a
custom interrupt controller in one of the onboard FPGAs, which cascades
into the 8641D's mpic. I'm trying to write a driver for it.

Looking at examples of cascaded interrupt handlers I've managed to get
to the point where the kernel is trying to register interrupts from the
DTB file I provide it. The problem is I don't know what virqs are being
assigned to the interrupts or how virqs are/should be assigned to a
cascaded interrupt controller.

Can anyone point me towards any documentation that my naïve googling is
missing or explain how this should work?

Martyn

----
Martyn Welch MEng MPhil MIET
Principal Software Engineer

GE Fanuc Intelligent Platforms
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