[RFC:PATCH 00/06] Strong Access Ordering page attributes for POWER7
Dave Kleikamp
shaggy at linux.vnet.ibm.com
Wed Jun 11 08:00:55 EST 2008
Allow an application to enable Strong Access Ordering on specific pages of
memory on Power 7 hardware. Currently, power has a weaker memory model than
x86. Implementing a stronger memory model allows an emulator to more
efficiently translate x86 code into power code, resulting in faster code
execution.
On Power 7 hardware, storing 0b1110 in the WIMG bits of the hpte enables
strong access ordering mode for the memory page. This patchset allows a
user to specify which pages are thus enabled by passing a new protection
bit through mmap() and mprotect(). I have tentatively defined this bit,
PROT_SAO, as 0x10.
In order to accomplish this, I had to modify the architecture-independent
code to allow the architecture to deal with additional protection bits.
Patches built against 2.6.26-rc5.
Any and all suggestions, complaints, flames, insults, etc. are appreciated.
Thanks,
Shaggy
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